Method for forming oxides on buried N.sup.+ -type regions

Details Method for forming oxides on buried N.sup.+ -type regions Method for forming oxides on buried N.sup.+ -type regions

Filed on

1997-03-06

Date issued

1999-03-09

Examiner

Dang, Trung

Patent Class

Semiconductor device manufacturing: process

SubClass

Formation of electrically isolated lateral semiconductive...

SubSubClass

Recessed oxide by localized oxidation

Other Related Categories

438439, 438262, H01L 2176

Type

Patent

Status

active

Patent number

058800093

Description

ABSTRACT:
A method for forming oxides on buried N.sup.+ -type regions in a memory cell fabrication process, suitable for forming oxides on the bury N.sup.+ -type regions before self-aligned MOS device etching, comprises: (1) implanting a high concentration of impurity into the buried N.sup.+ -type regions; (2) annealing the chip; and (3) executing a dry oxide process and then a wet oxidation process to the chip, thereby preventing damage to the edges of buried N.sup.+ -type regions caused by non-uniform thickness of oxides on buried regions during self-aligned MOS etching and resolving the problem of non-uniform oxides on buried N.sup.+ -type regions.

REFERENCES:
patent: 4551910 (1985-11-01), Patterson
patent: 5147813 (1992-09-01), Woo
patent: 5571736 (1996-11-01), Parterson et al.
patent: 5637528 (1997-06-01), Higashitani et al.

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