Static information storage and retrieval – Read/write circuit – Bad bit
Patent
1993-09-29
1995-06-13
Popek, Joseph A.
Static information storage and retrieval
Read/write circuit
Bad bit
36518904, 371 103, G11C 700
Patent
active
054249872
ABSTRACT:
The semiconductor memory device includes at least one pair of redundant digit lines (RD,RDb), first input/output lines (IO,IOb) connected to a pair of digit lines (D,Db) via a respective sense amplifier (SA) and a switch (SW), second input/output lines (IO',IOb')connected to the redundant digit line pair (RD,RDb) via a sense amplifier (RSA) and switch (RSW), and selective amplifier means (IOSW, IOSW', RIOSW, RIOSW') for amplifying second input/output lines when redundant digit lines are selected.
With this configuration, even when the redundant digit line pair is substituted for the digit line pair, it is possible to execute the redundancy operation by mere translation between these input/output line pairs.
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Mai Son
NEC Corporation
Popek Joseph A.
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