Static information storage and retrieval – Read/write circuit – With shift register
Patent
1987-03-12
1990-07-24
Chan, Eddie P.
Static information storage and retrieval
Read/write circuit
With shift register
36523003, 364900, 36492692, G11C 700, G06F 100
Patent
active
049439464
DESCRIPTION:
BRIEF SUMMARY
The present invention relates to a control system for chained circuit modules. It is known to connect a plurality of circuit modules in a chain, each module being capable of performing some memory and/or data processing operation. In particular, the circuit modules may be undiced chip areas of an integrated circuit wafer and the chain of modules may be grown by actuation of electronic switching functions within the modules, as described in GB 1 377 859. The chain may be single (and approximate a spiral) or may be branched.
As described in GB 1 377 859 it is necessary to be able to send commands to the circuit modules individually. The commands are used in controlling the growth of the chain and also in controlling operations carried out using the circuit modules. For example, it may be necessary to command the writing of data to or the reading of data from a memory module. A module may be regarded as composed of a function unit, which performs the memory or data processing operation proper of the unit, and control logic which responds to commands. Various techniques have been suggested for addressing commands to individual modules. Each module may be given its own address and commands can include address fields, whereby associative addressing is employed. This provides completely flexible addressing (any command can be sent to any module in the chain) but suffers from the disadvantages that every module has to be set up with its own address and the control logic is relatively complex. An improved proposal (see again GB 1 377 859) utilises an address number in each command. As the command passes from module to module, the address number is decremented or incremented until a predetermined number is reached (e.g. zero), whereupon the command is executed by the module at which this event occurs. This avoids the need to set up modules with individual addresses but the control logic is still relatively complex.
Another idea proposed in GB 1 377 859 is to issue a global command to all modules. Such a command is issued by way of a global line, that is to say a line running to all modules in parallel, in contrast to lines chained through the modules. Other global lines can include power and clock lines. A module performs a specific function when it receives the global command and the module is concurrently receiving a specific state signal from an adjacent module. In GB 1 377 859 this is proposed as part of the mechanism for growing the chain of modules. It is of extremely limited application, enabling one particular command to be sent only to the end of the chain. In use of the chain of modules, it is obviously necessary to be able to address various commands to modules anywhere along the chain.
An important consideration in the case of chained modules is the integrity of the chaining paths between modules. These include part of the control logic of each module and this part will be called the serial logic. The control logic will additionally include side-chain logic, that is to say logic which is branched off the path through which the modules are chained. Any defect in the serial logic of a module will break the chain and render the apparatus inoperable. Particularly when the modules are undiced chip areas, i.e. parts of a wafer scale integration (WSI) system, there is a high premium on keeping the serial logic as simple as possible. As is well known, a significant problem in WSI is avoidance of faulty modules. It is advantageous to be able to utilise the serial logic of a faulty module (provided the serial logic is functioning) even although the function unit of the module is not used, and may even be disabled, because it is faulty. The use of good serial logic of otherwise faulty modules makes it possible to grow chains more efficiently and include within the chain a higher proportion of non-faulty modules than if the chain excludes a module which is in any way faulty, (which is the approach adopted in GB 1 377 859).
The object of the present invention is to provide a control system which enables flexible addr
REFERENCES:
patent: 3882470 (1975-05-01), Hunter
patent: 3913072 (1975-10-01), Catt
patent: 3972031 (1976-07-01), Riemenschneider et al.
patent: 4038648 (1977-07-01), Chesley
patent: 4489397 (1984-12-01), Lee
patent: 4493055 (1985-01-01), Osman
patent: 4519035 (1985-05-01), Chamberlain
patent: 4528647 (1985-07-01), Chamberlain
R. Veit, "Increased Packing Density of Monolithic Storages", IBM Tech. Disc. Bull., vol. 13, No. 8, Jan. 1971 (New York).
G. Elie et al., "Multipoint Without Address", IBM Tech. Disc. Bull., vol. 25, No. 8, Jan. 1983 (New York).
Anamartic Limited
Chan Eddie P.
O'Connell Robert F.
Rudolph Rebecca L.
LandOfFree
Control system for chained circuit modules does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Control system for chained circuit modules, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Control system for chained circuit modules will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1271396