Process for planarizing insulating dielectric material

Fishing – trapping – and vermin destroying

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437240, 427 531, H01L 21316, H01L 2131

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active

051399679

ABSTRACT:
A method of processing a semiconductor wafer comprises the following sequential steps:
selectively fabricating a semiconductor wafer in multilevels to produce desired electronic devices and integrated circuits on the wafer, the selective fabrication resulting in an irregular upper surface topography;
applying a coating of insulating dielectric material having a melting point of less than or equal to about 850.degree. C. atop the fabricated wafer; and
selectively impinging laser energy upon the dielectric coating for a selected period of time to at least partially melt the dielectric coating and cause its upper surface to become planarized.

REFERENCES:
patent: 4554572 (1985-11-01), Chatterjee
patent: 4609407 (1986-09-01), Masao et al.

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