Input buffer circuit and method

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Input noise margin enhancement

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Details

326 62, 327197, 327333, H03K 1716

Patent

active

059907002

ABSTRACT:
An input buffer circuit includes a plurality of paths having a different threshold voltage, respectively, a comparator for comparing an output value of the paths, a switch for determining operation of the input buffer circuit based on an output value of the comparator, and a latch coupled to the switch. The input buffer circuit and method for using same maintains a previous output value to improve a noise margin of the input buffer circuit and to improve the stability of input buffer circuit operation.

REFERENCES:
patent: 4581545 (1986-04-01), Beale et al.
patent: 5027053 (1991-06-01), Ohri et al.
patent: 5512853 (1996-04-01), Ueno et al.
patent: 5808477 (1998-09-01), Gola et al.

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