Microcoded microprocessor with shared ram

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G06F 930

Patent

active

048253561

ABSTRACT:
A processor system utilizing a single shared RAM array, for storing microcode and other function data, with the shared array coupled to the processor by a single shared ADR/DATA bus. In one embodiment, an onboard ROM stores selected lines of microcode and a ROM accessing system supplies microcode from the ROM when the shared RAM array is busy performing some other RAM function.

REFERENCES:
patent: 3859636 (1975-01-01), Cook
patent: 3886523 (1975-05-01), Ferguson et al.
patent: 4390946 (1983-06-01), Lane
patent: 4586127 (1986-04-01), Horvath

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