Static information storage and retrieval – Read/write circuit – Sipo/piso
Patent
1979-10-24
1981-09-08
Hecker, Stuart N.
Static information storage and retrieval
Read/write circuit
Sipo/piso
357 24, 365183, 365238, G11C 1140, G11C 1928
Patent
active
042888646
ABSTRACT:
An SPS CCD memory system is provided wherein a single tap, preferably a storage node, on an input serial or shift register is connected to the input of a plurality of parallel shift registers through a fan out circuit and the output of the plurality of parallel shift registers is connected to a single tap, preferably a storage node, on an output serial or shift register through a fan in circuit.
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Altman, "Charge-Coupled Devices Move on Memories and Analog Signal Processing", Electronics, 8/8/74, pp. 91-101.
Kohyama et al, "A New Multiplexed Electrode-Per-Bit Structure for a 64-K Bit Charge-Coupled-Device Memory", IEEE Jour. No. 4, Solid-State Cir. 8/77, vol. SC-12, pp. 335-343.
Harroun Thomas V.
Heller Lawrence G.
Vogl, Jr. Norbert G.
Hecker Stuart N.
International Business Machines - Corporation
Limanek Stephen J.
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