Phase synchronization circuit having a loop filter including two

Oscillators – Automatic frequency stabilization using a phase or frequency... – Transistorized controls

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331 17, 331 25, H03L 7089, H03L 7093

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active

053732570

ABSTRACT:
In a phase synchronization circuit for generating a clock signal from an input signal, having a VCO, a phase comparator for comparing the phase of the input signal with that of an output signal of the VCO, and a loop filter for receiving an output signal of the phase comparator and providing a control voltage for the VCO, the loop filter includes first and second voltage-current converters for receiving the output signal of the phase comparator; a capacitor to be charged and discharged according to an output current of the first voltage-current converter; and a resistor for converting the output signal of the second voltage-current converter into the control voltage for the VCO. The ratio between currents for the input and output stages of a current multiplier in each of the first and second voltage-current converters is changed according to a control current provided through a control terminal when the frequency of the input signal is changed, to thereby change a transconductance of the converters without changing a damping factor. In this way, the circuit speedily carries out phase synchronization without changing a damping factor even if the frequency of an input signal is changed.

REFERENCES:
patent: 4890299 (1989-12-01), Dolivo et al.
patent: 4894734 (1990-01-01), Fischler et al.
patent: 5136260 (1992-08-01), Yousefi-Elezei
F. M. Gardner, "Hangup in phase-lock loops", IEEE Transactions On Communications, Publication Date Oct. 1977; vol. Com-25, No. 10, pp. 1210-1214.
K. H. Mueller et al, "Timing Recovery in Digital Synchronous Data Receivers", IEEE Transactions On Communications, Publication Date May 1976; vol. Com-24, No. 5, pp. 516-531.

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