Simple amplifying system for a dense memory array

Static information storage and retrieval – Systems using particular element – Flip-flop

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307530, 307DIG3, G11C 1140

Patent

active

044452012

ABSTRACT:
A system is provided in which two load devices connected to a latch are individually controlled and connected to a common input/output line. A bit/sense line is connected to each of two nodes on the latch. By providing two such latches each with bit/sense lines and two individually controlled load devices connected to the common input/output line, two cells of a word line may be sensed simultaneously.

REFERENCES:
patent: 3387286 (1968-06-01), Dennard
patent: 3588844 (1971-06-01), Christensen
patent: 3811076 (1974-05-01), Smith, Jr.
patent: 3841926 (1974-10-01), Garnache et al.
patent: 3940747 (1976-02-01), Kuo et al.
patent: 4040017 (1977-08-01), Lee
patent: 4069475 (1978-01-01), Boettcher
patent: 4080590 (1978-03-01), Pricer
patent: 4160275 (1979-07-01), Lee et al.
patent: 4287576 (1981-09-01), Pricer
W. K. Hoffman, IBM Technical Disclosure Bulletin, vol. 16, No. 7, Dec. 1973, p. 241, "Interleaved Memory Array".

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