Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Patent
1997-03-07
2000-04-11
Downs, Robert W.
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
395385, 711102, 711118, G06F 930
Patent
active
06049672&
ABSTRACT:
A microprocessor operates in response to microinstructions stored in a read only memory. A patch table stores a indication of patch microinstructions stored in cache memory. This cache memory caches data and/or macroinstructions for the microprocessor. Each new microaddress is compared with the patch table entries. If there in no match, then a multiplexer selects the microinstruction recalled from that microinstruction address within the microinstruction read only memory. If there is a match, then a corresponding patch microinstruction is recalled from the cache memory. The multiplexer selects this patch microinstruction. The microprocessor operates under the control of the selected microinstruction. This technique enables a fix of faulty microinstructions in the field, by supplying the computer user with the patch microinstructions. Using a portion of the cache memory to store the patch microinstructions eliminates any problem with specifying too large or too small a memory for patch microinstructions.
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Bosshart Patrick W.
Shiell Jonathan H.
Donaldson Richard L.
Downs Robert W.
Laws Gerald E.
Marshall, Jr. Robert D.
Texas Instruments Incorporated
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