Semiconductor device having multiple overlapping rows of bond pa

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Configuration or pattern of bonds

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Details

257784, H01L 2348, H01L 2352, H01L 2940

Patent

active

059629266

ABSTRACT:
The present invention comprises a semiconductor device (20) having a active circuit (22) and a bond pad area (24). Within the bond pad area there are a plurality of rows of bond pads. Sets of bond pads (30-36) include one bond pad from each row. The bond pads (26) are uniquely positioned within the bond pad area (24) to allow for a first wire pitch between pads which are adjacent and in the same set, and a second wire pitch between pads which are adjacent and in different sets. A method of determining placement of the bond pads (26) is taught.

REFERENCES:
patent: 4990996 (1991-02-01), Kumar et al.
patent: 5195237 (1993-03-01), Cray et al.
patent: 5468999 (1995-11-01), Lin et al.
patent: 5498767 (1996-03-01), Huddleston et al.
patent: 5719449 (1998-02-01), Strauss
Integrated Circuit Engineering Corporation; "Intel A80502-120 Pentium Processor", Construction Analysis Report No. SUB9506-02; p. 1 and Figure 4; Jun. 1995.

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