Process for formation of capacitor

Details Process for formation of capacitor Process for formation of capacitor

1991-02-21

1993-04-13

Powell, William A.

Adhesive bonding and miscellaneous chemical manufacture

Delaminating processes adapted for specified product

Delaminating in preparation for post processing recycling step

156651, 156653, 156657, 1566591, 156662, 437 52, 437191, 437233, 257296, H01L 21306, B44C 122, C03C 1500, C03C 2506

Patent

active

052019918

ABSTRACT:
A process for formation of a multi-stack type capacitor is disclosed, which comprises: steps of forming a polysilicon layer 5 on a source, forming a dielectric 5a, forming a layer 6, and forming a dielectric layer 6a in the cited order; step of self-aligning a contact pattern for connecting the layer 5 and the layer 7; step of carrying out an etching so as for the layer 5 and the layer 7 to be connected later; steps of forming the layer 7, and forming a dielectric layer 7a; step of self-aligning a contact pattern for connecting the layer 6 and a layer 8; step of carrying out an etching so as for the layer 6 and the layer 8 to be connected later; and step of forming the layer 8, the above steps being repeated in order to form a multi-stack type capacitor of a sandwiched form. According to the present invention, the device is protected from the etch damage, and is suitable for use in a high density memory device.

REFERENCES:
patent: 4700457 (1987-10-01), Matsukawa
patent: 5061651 (1991-10-01), Ino

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