Semiconductor memory device

Static information storage and retrieval – Read/write circuit

Patent

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Details

36518909, 365181, 365203, G11C 700, H01L 2100

Patent

active

049950029

ABSTRACT:
A semiconductor memory device in which a data line and a holding circuit for storing data thereon are connected through a transmission gate comprised of an N-type MOS transistor and a P-type MOS transistor, wherein the semiconductor memory device comprises an initial potential setting circuit for setting an initial potiential on the data line prior to readout operation of data from the holding circuit; and a control circuit operative to allow the both transistors of the transmission gate to be turned on at the time of writing data into the holding circuit, and to allow one of the transistors to be turned on at the time of reading data from the holding circuit. Where a hold potential changes when data in the holding circuit has been read out onto the data line, such a change in the hold potential increases on resistance of one of the transistors which has been turned on of the transmission gate. As a result, this change in the hold potential in held down to a small value, so it does not reach the threshold voltage of the holding circuit.

REFERENCES:
patent: 4779231 (1988-10-01), Holzapfel et al.

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