Integrated circuit window etch and planarization

Details Integrated circuit window etch and planarization Integrated circuit window etch and planarization

1992-07-30

1995-03-21

Fourson, George

Fishing, trapping, and vermin destroying

437235, 437240, 437947, 156643, H01L 21465

Patent

active

053995325

ABSTRACT:
A method of semiconductor integrated circuit fabrication which provides a tapered window and a smoothed dielectric. A trench is made by etching through patterned photoresist into a dielectric. Then the corners of the trench are smoothed by thermal flow. Next the trench is etched downward by RIE blanket etchback. A window with tapered sides is thereby opened to the substrate and the dielectric is simultaneously smoothed.

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patent: 4978420 (1990-12-01), Bach
Ghandhi, Sorab K., VLSI Fabrication Principles, Wiley & Sons, NY, 1983 pp. 458-459.

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