Method of fabricating conductive structures on substrates

Details Method of fabricating conductive structures on substrates Method of fabricating conductive structures on substrates

1992-12-18

1995-03-21

Dang, Thi

Adhesive bonding and miscellaneous chemical manufacture

Delaminating processes adapted for specified product

Delaminating in preparation for post processing recycling step

1566591, 1566611, H01L 2100

Patent

active

053992393

ABSTRACT:
The present invention is an integrated heat sink module and a method of fabricating conductive structures on a substrate. The method of the present invention includes cleaning a substrate material to remove any impurities present on the substrate surface. The method further includes placing a protective layer resilient to chemicals used in conductive structure formation, on a first surface. The first surface is opposite a second surface on which conductive structures are formed. The method includes forming conductive structures on the second surface of the substrate. The protective layer is then removed from the first surface of the substrate.

REFERENCES:
patent: 3960623 (1976-06-01), Gantley
patent: 4054484 (1977-10-01), Lesh et al.
patent: 4068022 (1978-01-01), Glick
patent: 4120707 (1978-10-01), Beasom
patent: 4159222 (1979-06-01), Lebow et al.
patent: 4325780 (1982-04-01), Schulz, Sr.
patent: 4364777 (1982-12-01), Grunert et al.
patent: 4407860 (1983-10-01), Fleming et al.
patent: 4467067 (1984-08-01), Valayil et al.
patent: 4540462 (1985-09-01), Mizunoya et al.
patent: 4557796 (1985-12-01), Druschke et al.
patent: 4568413 (1986-02-01), Toth et al.
patent: 4605471 (1986-08-01), Mitchell
patent: 4649417 (1987-03-01), Burgess et al.
patent: 4662956 (1987-05-01), Roth et al.
patent: 4756795 (1988-07-01), Bakos et al.
patent: 4935305 (1990-06-01), Kanehiro
patent: 4961987 (1990-10-01), Okuno et al.
patent: 4985294 (1991-01-01), Watanabe et al.
patent: 5011732 (1991-04-01), Takeuchi et al.
patent: 5021287 (1991-06-01), Otagiri et al.
patent: 5087509 (1992-02-01), Kuromitsu et al.
patent: 5165986 (1992-01-01), Gardner et al.
patent: 5190892 (1993-03-01), Sano
patent: 5231757 (1993-08-01), Chantraine et al.
patent: 5300172 (1994-04-01), Ishiwata et al.
Wolf et al. "Silicon Processing for the VLSI ERA Vol. 1: Process Technology", Lattice Press, 1986, p. 428.
Kerm, "The Evolution of Silicon Wafer Cleaning Technology", J. Electrochem. Soc. vol. 137, No. 6 Jun. 1990, pp. 1887-1892.
Electronics Manufacturing Productivity Facility, Electron '91 Proceedings, Oct. 22 and 23, 1991.
Lanxide Corporation, Preliminary Technical Datasheet, Sep. 8, 1989.

Affiliated with

Also associated with

Rating

Method of fabricating conductive structures on substrates does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method of fabricating conductive structures on substrates, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of fabricating conductive structures on substrates will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1146673