Shared bitline heterogeneous memory

Static information storage and retrieval – Powering – Data preservation

Patent

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Details

365154, 36523003, G11C 700

Patent

active

058674438

ABSTRACT:
A five-transistor static Random Access Memory (SRAM) cell accessed by a single bitline merged with heterogeneous memories, such as ROMs, EPROMs, EEPROMs, and DRAMs. Combined ROM and RAM cells have been included within a high performance signal processor. Advantages include area and power dissipation savings resulting from shared column bitlines, associated column decoders, and column sense amplifiers. This eliminates circuit duplication.

REFERENCES:
patent: 5353251 (1994-10-01), Uratani et al.
patent: 5379246 (1995-01-01), Nogami
patent: 5438538 (1995-08-01), Hashimoto

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