Low power, high speed level shifter

Details Low power, high speed level shifter Low power, high speed level shifter

1998-09-03

1999-08-10

Santamauro, Jon

Electronic digital logic circuitry

Interface

Supply voltage level shifting

326 68, H03K 190185

Patent

active

059364289

ABSTRACT:
A voltage level translator is disclosed which translates a CMOS input signal into a CMOS output signal where the low voltage level of the output signal is equal to the high voltage level of the input signal. The voltage level translator is described in an integrated circuit such as memory circuits, including DRAMs. Specifically, the voltage level translator produces an output signal which can be used as a gate voltage on a precharge transistor for a booted circuit where the gate voltage need only drop to the high voltage level of the input signal to shut the transistor off. The voltage level translator described, therefore, reduces the time and power required to translate an input signal by limiting the voltage swing of the output signal.

REFERENCES:
patent: 4897565 (1990-01-01), Shimizu
patent: 4920284 (1990-04-01), Denda
patent: 4977339 (1990-12-01), Denda
patent: 5225721 (1993-07-01), Gal et al.
patent: 5245228 (1993-09-01), Harter
patent: 5451888 (1995-09-01), Shimada
patent: 5528173 (1996-06-01), Merritt et al.
patent: 5539334 (1996-07-01), Clapp, III et al.
patent: 5666070 (1997-09-01), Merritt et al.

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