High-speed level shifter with simple circuit arrangement

Electronic digital logic circuitry – Interface – Logic level shifting

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326121, H03K 190175

Patent

active

053878280

ABSTRACT:
A level shifter has a preliminary level shifting circuit and a final level shifting circuit for stepwise changing a voltage range from complementary input signals to complementary output signals, and the preliminary level shifting circuit comprises two complementary inverters coupled between a constant voltage source and a pair of input nodes and controlled by the complementary input signals so that the number of component transistors is decreased.

REFERENCES:
patent: 4161663 (1979-07-01), Martinez
patent: 4575648 (1986-03-01), Lee
patent: 4845381 (1989-07-01), Cuevas
patent: 5068551 (1991-11-01), Bosnyak
patent: 5089722 (1992-02-01), Amedeo
patent: 5153465 (1992-10-01), Sandhu
Chappell et al., "Fast CMOS ECL Receivers With 100-mV Worst-Case Sensitivity" IEEE Journal of Solid State Circuits, vol. 23, No. 1, Feb. (1988).

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