Coded data generation or conversion – Converter calibration or testing
Patent
1996-06-14
1997-08-19
Young, Brian K.
Coded data generation or conversion
Converter calibration or testing
341144, 341155, H03M 110
Patent
active
056593120
ABSTRACT:
A method and apparatus suitable for built in self test (BIST) of analog-to-digital converters (ADCs) and digital-to-analog converters (DACs) embedded in a mixed-signal integrated circuit, and high precision converters. Deterministic test patterns, such as a binary count, are applied to the DAC, and via the DAC directly to the ADC or via an analog circuit to be tested in the test mode. The testing is performed digitally via the digital-analog-digital path, is compatible with conventional digital test, and requires minimal additional circuitry to implement. The output response of the ADC is accumulated into four or more signatures which individually represent a number of parameters including offset, gain, second harmonic distortion, third harmonic distortion, and differential non-linearity. Also, the four accumulated sums are used to calculate easily the coefficients of a third order polynomial which best fits a set of data points which are the digital output signals expressed as a function of the input test pattern.
REFERENCES:
patent: 4207520 (1980-06-01), Flora et al.
patent: 4315254 (1982-02-01), Honjyo et al.
patent: 4328552 (1982-05-01), Stovall
patent: 4340856 (1982-07-01), Orlandi
patent: 4354177 (1982-10-01), Sloane
patent: 4419656 (1983-12-01), Sloane
patent: 4656632 (1987-04-01), Jackson
patent: 4667296 (1987-05-01), Crowe
patent: 4710747 (1987-12-01), Holland
patent: 4758781 (1988-07-01), Ueno et al.
patent: 4875048 (1989-10-01), Shimizu et al.
patent: 4896282 (1990-01-01), Orwell
patent: 4947106 (1990-08-01), Chism
patent: 4947168 (1990-08-01), Myers
patent: 4969148 (1990-11-01), Nadeau-Dostie et al.
patent: 5047770 (1991-09-01), Engeler et al.
patent: 5132685 (1992-07-01), DeWitt et al.
patent: 5144225 (1992-09-01), Talbot et al.
patent: 5185607 (1993-02-01), Lyon et al.
patent: 5220519 (1993-06-01), Eller
patent: 5225834 (1993-07-01), Imai et al.
patent: 5289116 (1994-02-01), Kurita et al.
patent: 5293325 (1994-03-01), Roos
patent: 5349587 (1994-09-01), Nadeau-Dostie et al.
patent: 5381148 (1995-01-01), Mueck et al.
patent: 5428357 (1995-06-01), Haab et al.
patent: 5431514 (1995-07-01), Mukuda et al.
patent: 5493519 (1996-02-01), Allen, III
A. Jongepier, "Fast test method for serial A/D and D/A converters", European Test Conference, 1989, pp. 262-267.
Chen-Yang Pan et al., "Pseudo-Random Testing and Signature Analysis for Mixed-Signal Circuits", IEEE 1995, ICCAD 95, 1063-6757/95, pp. 102-107.
Chin-Long Wey, "Built-In Self-Test (BIST) Structure for Analog Circuit Fault Diagnosis", IEEE Transactions on Instrumentation and Measurement, vol. 39, No. 3, Jun. 1990, pp. 517-521.
Naveena Nagi et al., "A Signature Analyzer for Analog and Mixed-Signal Circuits", Computer Engineering Research Center, University of Texas at Austin, Austin, TX (undated), 4 pgs.
A.K. Lu et al., "An Analog Multi-Tone Signal Generator For Built-In-Self-Test Applications", International Test Conference, IEEE, 1994, O-7803-2102-2/94, Paper 27.3, pp. 650-659.
S. Mir et al., "Built-in Self-Test and Fault Diagnosis of Fully Differential Analog Circuits", INPG/TIMA Laboratory, 38031 Grenoble, France, undated, 5 pgs.
Michael J. Ohletz, "Hybrid Built-In Self-Test (HBIST) for Mixed Analog/Digital Integrated Circuits", Laboratorium fur Informationstechnologie, Universitat Hannover, Germany, undated, pp. 307-316.
M.F. Toner et al., "A BIST Scheme for an SNR Test of a Sigma-Delta ADC", IEEE 1993, International Test Conference 1993, O-7803-1429-8/93, Paper 37.3, pp. 805-814.
Karim Arabi et al., "A New Built-In Self-Test Approach for Digital-to-Analog and Analog-to-Digital Converters", Department of Electrical and Computer Engineering, Montreal, Quebec, Canada, 1994 ACM 0-89791-690-5/94/0011/0491, pp. 491-494.
Eiichi Teraoka et al., "A Built-In Self-Test for ADC and DAC in a Single-Chip Speech CODEC", 1993 IEEE, International Test Conference 1993, O-7803-1429-8/93, Paper 37.1, pp. 791-796.
Nagi Naveena
Sunter Stephen K.
Klivans Norman R.
LogicVision, Inc.
Young Brian K.
LandOfFree
Method and apparatus for testing digital to analog and analog to does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method and apparatus for testing digital to analog and analog to, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and apparatus for testing digital to analog and analog to will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1107890