Static information storage and retrieval – Systems using particular element – Superconductive
Patent
1993-02-26
1994-11-15
LaRoche, Eugene R.
Static information storage and retrieval
Systems using particular element
Superconductive
365160, 327186, 327527, 326 3, G11C 1144
Patent
active
053654765
ABSTRACT:
A three-port Josephson memory cell has one input port (a data line) and two output ports (first and second sense lines). The memory cell receives a write enable pulse on a write line to store a bit of data from the data line as circulating supercurrent. The memory cell also receives a first read enable pulse on a first read line to enable assertion of the stored data onto the first sense line, and receives a second read enable pulse on a second read line to enable assertion of the stored data onto the second sense line. To provide non-destructive readout and wide margins, the memory cell includes a write gate responsive to the write enable pulse for storing current from the data line, a first read gate responsive to the stored current and the first read enable pulse, a second read gate responsive to the stored current and the second read enable pulse, a first buffer gate responsive to the first read gate for asserting a data output signal on the first sense line, and a second buffer gate responsive to the second read gate for asserting a data output signal on the second sense line. In the preferred construction, the current is stored in two storage loops. One storage loop includes a control current path for the first read gate, and the other storage loop includes the control current path for the second read gate.
REFERENCES:
patent: 4509146 (1985-04-01), Wang et al.
patent: 4974205 (1990-11-01), Kotani
patent: 5229962 (1993-07-01), Yuh et al.
patent: 5253199 (1993-10-01), Gibson
G. L. Chiu, Three State Superconductive NDRO Memory Cell, IBM Technical Disclosure Bulletin, vol. 27, No. 1B, pp. 806-809, Jun. 1984.
Perng-Fei Yuh, "A Wide-Margin, Multiple Fan-In NOR Gate for Josephson Decoder," Hypres, Inc. 175 Clearbook Rd, Elmsford, N.Y., pp. 1-4.
Perng-Fei Yuh et al., "A Buffered Nondestructive-Readout Josephson Memory Cell with Three Gates," IEEE Trans. on Magnetics, vol. 27, No. 2, New York (Mar. 1991), pp. 2876-2878.
S. Tahara et al., "4-Kbit Josephson Nondestructive Read-out RAM Operated at 500 psec and 6.7 mW," IEEE Trans. on Magnetics, vol. 27, No. 2, New York (Mar. 1991), pp. 2626-2633.
Seigo Kotani et al., "A Subnanosecond Clock Josephson 4-bit Processor," IEEE J. of Solid-State Circuits, vol. 25, No. 1, New York, Feb. 1990, pp. 117-124.
Shuichi Nagasawaa et al., "570-ps 13-mW Josephson 1-kbit NDRO RAM," IEEE J. of Solid-State Circuits, vol. 24, No. 5, New York, Oct. 1989, pp. 1363-1371.
Joshifusa Wada, "Josephson Memory Technology," Proceedings of the IEEE, vol. 77, No. 8, (Aug. 1989), New York, pp. 1194-1207.
Itaru Kurosawa et al., "A 1-bit Josephson Random Access Memory Using Variable Threshold Cells," IEEE J. of Solid-State Circuit, vol. 24, No. 4 (Aug. 1989), New York, pp. 1034-1039.
Norio Fujimaki, "Josephson Modified Variable Threshold Logic Gates for Use in Ultra-High-Speed LSI," IEEE Trans, on Electron Devices, vol. 36, No. 2 (Feb. 1989), New York, pp. 433-446.
Juri Matisoo, "The Superconducting Computer," Scientific American (May 1980), New York, pp. 50-65.
S. M. Faris et al., "Basic Design of a Josephson Technology Cache Memory," IBM J. Res. Development, vol. 24, No. 2 (Mar. 1980), pp. 143-154.
Walter H. Henkels, "Experimental Single Flux Quantum NDRO Josephson Memory Cell," IEEE J. of Solid-State Circuits, vol. SC-14, No. 5 (Oct. 1979), New York, pp. 794-796.
Cefalo Albert P.
Digital Equipment Corporation
Dinh Son
Feltovic Robert J.
Hudgens Ronald C.
LandOfFree
Three-port Josephson memory cell for superconducting digital com does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Three-port Josephson memory cell for superconducting digital com, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Three-port Josephson memory cell for superconducting digital com will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1103001