CMOS input circuit for providing logical output signal from TTL

Electronic digital logic circuitry – Accelerating switching

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326 86, H03K 19017

Patent

active

054555205

ABSTRACT:
An input circuit having a CMOS component which outputs correct logical values without through-current flowing when a high level logic output signal V.sub.OH at TTL level is input thereto. The input circuit 1 comprises inverter 20 which outputs by logically inverting the input signals and through-current prevention circuit 21 which stops the flow of current to inverter 20 from power supply V.sub.CC. The through-current prevention circuit 21 comprises reference voltage generating circuit 10, inverters 12 and 13, and MOS transistors 11a, 11b, 14, and 15. The threshold value voltage of inverter 12 is set slightly lower than the high logic level output V.sub.OH at TTL level, and the threshold value voltage of inverter 20 is set lower than inverter 12. By inverter 20 outputting a low-level signal through inverting and stopping the flow of current to inverter 20 by MOS transistor 15 turning OFF when the voltage of signal input to inverter 20 is at approximately the high logic level output at TTL level, through-current does not flow to inverter 20 and a correct logic value is output.

REFERENCES:
patent: 4658156 (1987-04-01), Hashimoto
patent: 4791323 (1988-12-01), Austin
patent: 4825106 (1989-04-01), Tipon et al.
patent: 4845381 (1989-07-01), Cuevas
patent: 5160855 (1992-11-01), Dobbenpuhl
patent: 5266849 (1993-11-01), Kitahara et al.

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