Pulse or digital communications – Synchronizers – Phase displacement – slip or jitter correction
Patent
1997-04-17
2000-01-04
Chin, Stephen
Pulse or digital communications
Synchronizers
Phase displacement, slip or jitter correction
331 1A, 331 17, 327156, 327157, 327158, H03D 324
Patent
active
060118229
ABSTRACT:
A phase locked loop includes a differential charge pump to cancel static phase error and reduce sensitivity to noise. The differential charge pump comprises two substantially identical single-ended charge pumps so that under locked condition, changes in voltage at the charge pumps' output terminals are substantially identical, thereby maintaining a substantially constant difference between the charge pumps' output voltage. A differential input voltage-controlled oscillator receives the output of the differential charge pump and generates a clock signal with a frequency proportional to the voltage difference output by the differential charge pump. A common mode bias circuit adjusts the common mode voltage output by the differential charge pump to optimize the voltage swing available at the differential charge pump's output terminals. The structure can be easily modified to implement a delay locked loop by replacing the differential input voltage-controlled oscillator with a differential input voltage-controlled delay circuit.
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Chin Stephen
Ghayour Mohammad
LSI Logic Corporation
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