Nonvolatile semiconductor memory device and method for fabricati

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

257316, 257344, H01L 29788, H01L 2976

Patent

active

061216550

ABSTRACT:
The nonvolatile semiconductor memory device of the present invention includes: a semiconductor substrate having a surface including a first surface region at a first level, a second surface region at a second level lower than the first level, and a step side region linking the first surface region and the second surface region together; a channel region formed in the first surface region of the semiconductor substrate; a source region and a drain region which are formed in the surface of the semiconductor substrate so as to interpose the channel region therebetween; a first insulating film formed on the surface of the semiconductor substrate; a floating gate formed on the first insulating film; a second insulating film formed on the floating gate; and a control gate which is capacitively coupled to the floating gate via the second insulating film. The drain region includes a low-concentration impurity layer which is formed in the second surface region and which has one end extending toward the step side region, and a high-concentration impurity layer which is connected to the low-concentration impurity layer and which is formed in a region distant from the channel region. As impurity concentration of the low-concentration impurity layer is lower than an impurity concentration of the high-concentration impurity layer. The floating gate covers the step side region and at least a part of the low-concentration impurity layer via the first insulating film.

REFERENCES:
patent: 5337274 (1994-08-01), Ohji
patent: 5414287 (1995-05-01), Hong
patent: 5656839 (1997-08-01), Komori et al.
patent: 5719425 (1998-02-01), Akram et al.
patent: 5747849 (1998-05-01), Kuroda et al.
patent: 5780341 (1998-07-01), Ogura
S. Mukherjee, et al., "A Single Transistor EEPROM Cell and its Implementation in a 512K CMOS EEPROM", IEEE IEDM 1985 Technical Digest, pp. 616-619, Dec. 1-4, 1985.
H. Kume, et al., A Flash-Erase EEPROM Cell with an Asymmetric Source and Drain Structure, IEEE IEDM 1987 Technical Digest, pp. 560-563, Dec. 6-9, 1987.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Nonvolatile semiconductor memory device and method for fabricati does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Nonvolatile semiconductor memory device and method for fabricati, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Nonvolatile semiconductor memory device and method for fabricati will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-1076002

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.