Dram capacitor arrays with 3-capacitor and 6-capacitor geometrie

Details Dram capacitor arrays with 3-capacitor and 6-capacitor geometrie Dram capacitor arrays with 3-capacitor and 6-capacitor geometrie

1997-11-25

2000-09-19

Chaudhuri, Olik

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257303, H01L 27108, H01L 2976, H01L 2994, H01L 31119

Patent

active

061216534

ABSTRACT:
Semiconductor processing methods include forming a plurality of patterned device outlines over a semiconductor substrate, forming electrically insulative partitions or spacers on at least a portion of the patterned device outlines, and forming a plurality of substantially identically shaped devices relative to the patterned device outlines. Individual formed devices are spaced from at least one other of the devices by a distance no more than a width of one of the electrically insulative spacers. In such manner, device pitch is reduced by almost fifty percent. According to one aspect, elongated electrically conductive lines are formed. According to another aspect, capacitors are formed which, according to a preferred embodiment form part of a dynamic random access memory (DRAM) array.

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