Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Patent
1995-09-25
1997-08-05
Niebling, John
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
Insulated gate formation
438658, 438660, H01L 2128
Patent
active
056542429
ABSTRACT:
A WSi.sub.x layer wherein the value of x as the stoichiometry of Si is not less than 2.7 and preferably not less than 3.0 is formed by LPCVD based upon reduction of SiCl.sub.2 H.sub.2 of WF.sub.6. Even if this WSi.sub.x film is used without an adhesion layer such as poly Si (polycide structure), it is excellent in adhesion with respect to an SiO.sub.2 film and provides a gate electrode capable of maintaining a satisfactory breakdown voltage value of a gate oxide film. If n-type and p-type impurities are ion-implanted into an nMOS forming region and a pMOS forming region of the WSi.sub.x layer and patterned, a gate electrode of a reduced thickness and a low resistance having a controlled work function may be formed for providing symmetrical threshold voltages.
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Bilodeau Thomas G.
Niebling John
Sony Corporation
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