Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Patent
1997-05-19
2000-01-04
Loke, Steven H.
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
257301, 257797, H01L 2976, H01L 27108, H01L 23544
Patent
active
060112921
ABSTRACT:
A semiconductor device with an alignment mark has a first well of a first conductivity type formed on the entire surface of a semiconductor substrate, a second well of a second conductivity type opposite to the first conductivity type formed within a desired region of the first well, and an oxide film formed on said first well and said second well, the first well having a higher impurity concentration than that of the semiconductor substrate, the depth of the first well being greater than that of said second well, and the oxide film having a step-wise alignment mark at a boundary between the first well and the second well.
REFERENCES:
patent: 3212162 (1965-10-01), Moore
patent: 4567644 (1986-02-01), Allison
patent: 4641419 (1987-02-01), Kudo
patent: 4729964 (1988-03-01), Natasuaki et al.
patent: 4795716 (1989-01-01), Yilmaz et al.
patent: 4897702 (1990-01-01), Sunouchi
patent: 4983534 (1991-01-01), Kikuta
patent: 5374838 (1994-12-01), Sawada et al.
Nicollian et al., "MOS (Metal Oxide Semiconductor) Physics and Technology," 1982, pp. 718-721.
Pimbley et al., "VLSI Electronics Microstructure Science," vol. 19, Advanced CMOS Process Technology, 1989, pp. 145-147.
Iizuka et al., "Evolution of DRAM in Silicon MOS Technology, " VLSI and Computers First International Conference on Computer Technology, 1987, pp. 650-655.
Harris, Electronics Review, "Scaled-Down C-MOS May Catapult GE to Chip Forefront," vol. 56, No. 15, 1983, pp. 47-78.
Goodenough, Electronic Design, "Advances in Processing Grab Most of the Attention as IEDM's Program Unfolds," vol. 32, No. 24, 1984, pp. 73-100.
Campbell et al., IBM Technical Disclosure Bulletin, "Method for Forming N+--P+ Tunnel Junctions," vol. 25, No. 11B, 1983.
Ahlgren et al., IBM Technical Disclosure Bulletin, "Silicon Tunnel Diode Process for Bipolar Technology," vol. 25, No. 11B, 1983.
IBM Technical Disclosure Bulletin, "Recessed Oxide Isolation Process," vol. 28, No. 8, 1986.
Kabushiki Kaisha Toshiba
Loke Steven H.
LandOfFree
Semiconductor device having an alignment mark does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor device having an alignment mark, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor device having an alignment mark will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1074615