I/O and memory bus system for DFPs and units with two- or multi

Details I/O and memory bus system for DFPs and units with two- or multi I/O and memory bus system for DFPs and units with two- or multi

1997-10-08

2000-09-12

Ray, Gopal C.

Electrical computers and digital data processing systems: input/

Intrasystem connection

710110, 710129, 712 11, G06F 1340, G06F 1580

Patent

active

061191817

ABSTRACT:
A uniform bus system is provided which operates without any special consideration by a programmer. Memories and peripheral may be connected to this bus system without any special measures. Likewise, units may be cascaded with the help of the bus system. The bus system combines a number of internal lines, and leads them as a bundle to terminals. The bus system control is predefined and does not require any influence by the programmer. Any number of memories, peripherals or other units can be connected to the bus system.

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