Daisy chained clock distribution scheme

Details Daisy chained clock distribution scheme Daisy chained clock distribution scheme

1995-06-26

1996-08-13

Westin, Edward P.

Electronic digital logic circuitry

Clocking or synchronizing of logic stages or gates

327297, 327293, H03K 1900

Patent

active

055460232

ABSTRACT:
A daisy chained clock distribution scheme for distributing a clock signal from a central communications clock driver to the nodes of a massively parallel multi-processor computer or supercomputer. The daisy chained clocking scheme is implemented using point-to-point clock distribution of a differential clock signal to the communication nodes of a plurality of processors in a multicomputer system or to components connected to a common bus in a high speed microprocessor system. Differential signaling is employed wherein the differentiality is maintained including through silicon. In an alternate embodiment, the clock pulse is also regenerated in each node component.

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patent: 4939389 (1990-07-01), Cox et al.
patent: 4975605 (1990-12-01), Bazes
patent: 5220211 (1993-06-01), Christopher et al.

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