Computer system for executing programs using an internal cache w

Details Computer system for executing programs using an internal cache w Computer system for executing programs using an internal cache w

1995-03-14

1998-09-15

Voeltz, Emanuel Todd

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

395651, 395559, G06F 1300

Patent

active

058095314

ABSTRACT:
A method is disclosed for implementing a processing environment for a processor having an on-chip cache such that a functional external memory subsystem is not required. The on-chip cache is initialized upon start-up of the processor, which is coupled to a boot-up read only memory (ROM), such that each line in each way of the on-chip cache is driven to the same known state of the cache consistency protocol implemented by the on-chip cache. The on-chip cache is loaded with dummy data through the use of a ready signal generator, which ends the wait state of the processor allowing the processor to proceed with loading although no valid data exists. Regardless of the validity or contents of the dummy data, the on-chip cache will be driven to the known state without resorting to the external memory subsystem. The on-chip cache may then be used as a memory device for use with client programs contained in the boot-up ROM. Execution of the client programs can proceed without a functional external memory subsystem.

REFERENCES:
patent: 4195341 (1980-03-01), Joyce et al.
patent: 4493026 (1985-01-01), Olnowich
patent: 4667288 (1987-05-01), Keeley et al.
patent: 4669043 (1987-05-01), Kaplinsky
patent: 4794524 (1988-12-01), Carberry et al.
patent: 4905188 (1990-02-01), Chuang et al.
patent: 5025366 (1991-06-01), Baror
patent: 5031141 (1991-07-01), Guddat et al.
patent: 5113508 (1992-05-01), Groves et al.
patent: 5131083 (1992-07-01), Crawford et al.
patent: 5136691 (1992-08-01), Baror
patent: 5185879 (1993-02-01), Yamada et al.
patent: 5239639 (1993-08-01), Fischer et al.
patent: 5263153 (1993-11-01), Intrater et al.
patent: 5274787 (1993-12-01), Hirano et al.
patent: 5285323 (1994-02-01), Hetherington et al.
System Interface of the N532532 Microprocessor by Sidi et al, pp. 232-235, 1988.
Intel i860.TM. XP Microprocessor Data Book Table of Contents and pp. 41-47; Publication Date: May 1991.

Affiliated with

Also associated with

Rating

Computer system for executing programs using an internal cache w does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Computer system for executing programs using an internal cache w, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Computer system for executing programs using an internal cache w will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-104740