Semiconductor integrated circuit device

Static information storage and retrieval – Read/write circuit – Flip-flop used for sensing

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Details

365207, 36518911, G11C 700

Patent

active

056803567

ABSTRACT:
A memory cell is formed by flip-flop connection of a load transistor pair of a first load transistor and a second load transistor and a drive transistor pair of a first drive transistor and a second drive transistor. A first switch which is controlled by a wordline and a second switch which is activated only at the time of the write operation are connected in series to a first memory node. The second switch is serially coupled between the first memory node and the first drive transistor. An electric current is injected from a sense amplifier into a bitline pair selected at the time of the read operation, to detect an impedance which varies with the signal potential at the first memory node.

REFERENCES:
patent: 5323345 (1994-06-01), Ohsawa
patent: 5457657 (1995-10-01), Suh

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