Static information storage and retrieval – Read/write circuit – Data refresh
Patent
1978-09-01
1980-05-06
Hecker, Stuart N.
Static information storage and retrieval
Read/write circuit
Data refresh
365 75, 365183, 307221C, G11C 1928, G11C 706
Patent
active
042020468
ABSTRACT:
A data storage system for storing multilevel, non-binary data includes a charge coupled device (CCD) shift register and a detection circuit for detecting the data level represented by the charge or signal within each cell location of the CCD shift register. The detection circuit includes a sense amplifier for comparing the signals from two adjacent cell locations, with one signal representing a known data level. The comparison of adjacent cell locations compensates for signal losses during shifting, since the losses experienced by adjacent cell locations are nearly identical. Switching transistors cause the output of an incrementing digital-to-analog converter to be added to one of the signals prior to comparison. The output of the sense amplifier is provided to a flip-flop, which controls the switching transistors. The outputs of the sense amplifier and flip-flop are connected to an EXCLUSIVE NOR gate, whose output enables an up/down counter, which in turn provides the detected data level.
REFERENCES:
patent: 3946368 (1976-03-01), Chou
patent: 3999171 (1976-12-01), Parsons
patent: 4085459 (1978-04-01), Hirabayashi
Cavender J. T.
Dugas Edward
Hecker Stuart N.
Jewett Stephen F.
NCR Corporation
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