Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Patent
1997-05-14
2000-10-31
Hardy, David
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
257328, 257329, 257330, 257336, 257344, 257401, H01L 2976, H01L 2994, H01L 31113, H01L 31119
Patent
active
061406791
ABSTRACT:
A zero thermal budget manufacturing process for a MOS-technology power device. The method comprises the steps of: forming a conductive insulated gate layer on a surface of a lightly doped semiconductor material layer of a first conductivity type; removing the insulated gate layer from selected portions of the semiconductor material layer surface; implanting a first dopant of a second conductivity type into the selected portions of the semiconductor material layer, the insulated gate layer acting as a mask and the first dopant of the first conductivity type being implanted in a dose and with an implantation energy suitable to obtain heavily doped regions substantially aligned with the edges of the insulated gate layer; implanting a second dopant of the second conductivity type along directions at prescribed angles with respect to a direction orthogonal to the semiconductor material layer surface, the insulated gate layer acting as a mask, the second dopant being implanted in a dose and with an implantation energy suitable to obtain lightly doped channel regions extending under the insulated gate layer; and implanting a third dopant of the first conductivity type into the heavily doped regions, to form source regions substantially aligned with the edges of the insulated gate layer.
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Ferla Giuseppe
Frisina Ferruccio
Consorzio per la Ricerca sulla Microelettronica nel Mezzogiorno
Fenty Jesse A.
Galanthay Theodore E.
Hardy David
Morris James H.
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