Zero power high speed programmable circuit device architecture

Details Zero power high speed programmable circuit device architecture Zero power high speed programmable circuit device architecture

1994-02-09

1995-08-08

Popek, Joseph A.

Static information storage and retrieval

Systems using particular element

Flip-flop

365185, 365228, G11C 1400

Patent

active

054405084

ABSTRACT:
A non-volatile, low, and zero power, high speed self-sensing programmable device and architecture including a non-volatile self-sensing cell. The non-volatile self-sensing cell is connected out of the speed path of the programmable device, permitting rapid, non-volatile programming and reading operations to be conducted. According to one version, two self-sensing cells are provided with a means for selecting one of the cells for programming or read operation. Each non-volatile self-sensing cell includes a latch having cross-coupled, pull-up transistors and non-volatile pull-down cells. The cross-coupled pull-up transistors are field effect transistors having gates which are connected to the opposite sources of the cross-coupled pull-up transistors.

REFERENCES:
patent: 4914318 (1990-04-01), Allen
patent: 5065362 (1991-11-01), Herdt et al.
patent: 5079450 (1992-01-01), Win et al.
patent: 5210448 (1993-05-01), Takata

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