Zero detect circuit and method for high frequency integrated...

Electronic digital logic circuitry – Function of and – or – nand – nor – or not – Field-effect transistor

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C326S098000

Reexamination Certificate

active

06593778

ABSTRACT:

BACKGROUND
1. Field
An embodiment of the present invention relates to the field of high frequency integrated circuits and, more particularly, to a zero detect circuit and method for use in high frequency integrated circuits.
2. Discussion of Related Art
Zero detect circuitry, a simple example of which is a NOR gate, may be used in microprocessors and other types of integrated circuits for a variety of different purposes. For example, in a processor, zero detect circuitry may be used in floating point and/or integer execution units to detect leading zeros and/or zero data and/or in a processor front-end to process address information.
As the operating frequencies of processors and other integrated circuits continue to increase, zero detect operations should be performed very fast in order not to compromise performance of the host integrated circuit. As operating frequencies have continued to increase, data, instruction and address widths have also increased.
Conventional zero detect circuits have been implemented in static complementary metal oxide semiconductor (CMOS) logic using AND/OR gates. Static CMOS logic is notoriously slow such that a static CMOS zero detect circuit typically does not meet the needs of today's high performance microprocessors, for example. Further, multiple logic stages may be needed to implement a zero detect circuit to handle wider data, instruction and/or address information.


REFERENCES:
patent: 3325653 (1967-06-01), Husher et al.
patent: 3715603 (1973-02-01), Lerch
patent: 4038563 (1977-07-01), Zuleeg et al.
patent: 5241490 (1993-08-01), Poon
patent: 5291076 (1994-03-01), Bridges et al.
patent: 5537063 (1996-07-01), Dao
patent: 5592107 (1997-01-01), McDermot et al.
patent: 5661675 (1997-08-01), Chin et al.
patent: 5942917 (1999-08-01), Chappell et al.
patent: 6060909 (2000-05-01), Aipperspach et al.
patent: 6060910 (2000-05-01), Inui
patent: 6172531 (2001-01-01), Aipperspach et al.
patent: 6316961 (2001-11-01), Kanetani et al.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Zero detect circuit and method for high frequency integrated... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Zero detect circuit and method for high frequency integrated..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Zero detect circuit and method for high frequency integrated... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3062795

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.