Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
Reexamination Certificate
2001-03-22
2002-02-26
Tokar, Michael (Department: 2819)
Electronic digital logic circuitry
Signal sensitivity or transmission integrity
Bus or line termination
C326S086000
Reexamination Certificate
active
06351138
ABSTRACT:
BACKGROUND OF THE INVENTION
This invention relates to transmission lines, and more particularly to active terminators for transmission lines.
Cables and longer wiring traces on printed-circuit boards (PCBs) can act as transmission lines. Such lines are treated as transmission lines when the time for a signal to travel from one end to the other end of the line is equal to or more than half of the signal transition (rise or fall) time. High-performance integrated circuits can decrease rise and fall times, while PCB traces remain roughly constant. Thus more signal lines have to be treated as transmission lines in more advanced systems.
Impedance mismatches between the transmission line and its loads cause reflections. Reflection are signals that travel along the transmission line, back and forth between the driver and a receiver, causing unwanted signal ringing, overshoot, undershoot, and noise. The quality of signals is degraded.
Various techniques are used to minimize reflection and ringing. Terminating resistors, resistor-capacitors, and diodes can be added to the transmission line to match line impedances or clamp the undershoots and overshoots of ringing. Active terminators have also been used.
FIG. 1
is a diagram of a prior-art active terminator for a transmission line. P-channel transistor
12
and n-channel transistor
14
have their drains connected to a transmission line. Transistors
12
,
14
are biased on so that they can actively terminate the transmission line.
The desired gate biases for transistors
12
,
14
is generated by current-mirror transistors
16
,
18
, which each have their drains coupled to their gates. A continuous D.C. current
11
is generated by a current source, causing current to flow through current-mirror transistors
16
,
18
from power to ground. The p-channel gate node from current-mirror transistor
16
is coupled to the gate of p-channel transistor
12
. This p-gate node is biased to about one transistor threshold of p-channel transistor
16
below the power-supply voltage. P-channel transistor
12
is biased in the linear region and has a relatively low drain current compared to a similar transistor biased by a larger gate-to-source voltage in the saturated region.
Likewise, n-channel transistor
14
has its gate biased to about one n-channel transistor threshold above ground by n-channel current-mirror transistor
18
. Since the n-channel threshold is about 0.6 volt, n-channel transistor
14
clamps the transmission line to about −500 mV. When the transmission-line voltage drops below ground to −0.5 volt or beyond, n-channel transistor
14
turns on more strongly in the saturated region, clamping the undershoot. Transistors
12
,
14
need to be rather large in area to provide a sufficient clamping current despite being biased in the linear region.
The constant current through transistors
16
,
18
is undesirable, since many complementary metal-oxide-semiconductor (CMOS) digital circuits are zero standby power devices. Stability at the gate node is also a problem, since transitions on the transmission line can be coupled to the gate nodes through the drain-to-gate parasitic capacitances of transistors
12
,
14
. The drain current of transistors
12
,
14
can be reduced by the noise coupled into the gate nodes, reducing the effectiveness of the active clamp.
What is desired is a zero-standby-power active termination circuit for a transmission line. A lower-power terminator is desired using CMOS transistors.
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Auvinen Stuart T.
Le Don Phu
Pericom Semiconductor Corp.
Tokar Michael
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