Zero-cost non-volatile memory cell with write and erase...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257S318000, C365S185100, C365S184000

Reexamination Certificate

active

06949784

ABSTRACT:
A memory device includes a coupling capacitor and a field-effect transistor. The coupling capacitor is formed from (1) a first dopant region in a second dopant region on a substrate, (2) a gate dielectric atop the first dopant region, and (3) a first gate conductor atop the gate dielectric. The coupling capacitor has the first gate conductor coupled to a second gate conductor of the field-effect transistor. A voltage can be applied to the second dopant region to isolate the coupling capacitor from the substrate by reverse biasing a PN junction formed between the first dopant region and the second dopant region.

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patent: 6674119 (2004-01-01), Hashimoto et al.
patent: 2004/0084705 (2004-05-01), Moore
Stanley Wolf Ph.D., “Silicon Processing For The VLSI Era, vol. 2: Process Integration,” Paper, Lattice Press, 1990, pp. 492, 548, 431 (5 pages total).

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