xCP on 2 CSI

Details xCP on 2 CSI xCP on 2 CSI

2009-10-21

2011-12-27

Nguyen, Linh (Department: 2819)

Electronic digital logic circuitry

Interface

Current driving

C326S083000, C326S086000, C326S087000, C326S080000, C375S312000, C375S316000, C375S257000, C375S335000, C341S100000, C341S101000

Reexamination Certificate

active

08085066

ABSTRACT:
A microprocessor control unit (MCU) is mounted on a printed circuit board. The MCU includes first and second clocked serial interface (CSI) circuits. The first CSI circuit is configured to serially transmit a first xCP packet to a first encoder circuit, which in turn is configured to generate an encoded first xCP packet as a function of the first xCP packet and a first clock signal. A first low voltage differential signal (LVDS) circuit is coupled to the first encoder circuit and configured to serially receive the encoded first xCP packet therefrom. The first LVDS circuit is configured to generate a first differential signal as a function of the encoded first xCP packet.

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