xB/yB coder programmed within an embedded array of a...

Details xB/yB coder programmed within an embedded array of a... xB/yB coder programmed within an embedded array of a...

2007-10-09

2007-10-09

Le, Don (Department: 2819)

Electronic digital logic circuitry

Multifunctional or programmable

Having details of setting or programming of interconnections...

C326S041000

Reexamination Certificate

active

11242689

ABSTRACT:
A programmable logic device (PLD) with logic blocks and an embedded array block includes an x-bit (xB)/y-bit (yB) coder programmed into the embedded array block instead of into the logic blocks. An xB/yB coder programmed into an embedded array block of a PLD instead of into logic blocks utilizes less space in a PLD than an xB/yB encoder programmed into the logic blocks. Additionally, the xB/yB coder can operate without row or column crossing for efficient timing in high-speed applications. In an embodiment, the xB/yB coder is an 8B/10B coder. In a further embodiment, the 8B/10B coder comprises a 5B/6B encoder and a 3B/4B encoder.

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Xilinx, 8b/10b Encoder v5.0, DS254 May 21, 2004.
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Alcatel, Implementing an 8b/10b Encoder/Decoder for Gigabit Ethernet in an Actel SX FPGA Family, Oct. 1998.

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