Write VCCMIN improvement scheme

Details Write VCCMIN improvement scheme Write VCCMIN improvement scheme

2007-01-18

2008-12-02

Le, Vu A (Department: 2824)

Static information storage and retrieval

Systems using particular element

Flip-flop

C365S204000

Reexamination Certificate

active

07460391

ABSTRACT:
A semiconductor memory is disclosed, which comprises a plurality of memory cells, at least one high voltage power supply (CVDD) line coupled to the plurality of memory cells for supplying power to the same, and at least one controllable discharging circuit coupled between the CVDD line and a complementary low voltage power supply (ground), wherein only during a write operation the controllable discharging circuit is turned on for discharging the CVDD line.

REFERENCES:
patent: 5757702 (1998-05-01), Iwata et al.
patent: 6791895 (2004-09-01), Higeta et al.
patent: 7397693 (2008-07-01), Yamaoka et al.

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