Static information storage and retrieval – Read/write circuit – Erase
Patent
1993-04-10
1994-11-08
LaRoche, Eugene R.
Static information storage and retrieval
Read/write circuit
Erase
365195, 36523003, G11C 700
Patent
active
053633342
ABSTRACT:
An erasable programmable memory device has a number of contiguous data storage cells forming the data memory of the device. The address of one of these data storage cells is stored to designate it as a cell which is to be write protected so that its contents may not thereafter be erased or overwritten. Information is also stored to identify the total number of contiguous data storage cells to be similarly write protected commencing with the cell whose address is stored to designate write protection. The contents of the designated and identified cells are then made permanent. Write protection of the designated and identified cells is accomplished by comparing each write operation address with the addresses of the data storage cells encompassed within the protected area, and if it is within that area, aborting the write operation.
REFERENCES:
patent: 4931993 (1990-06-01), Urushima
patent: 4975878 (1990-12-01), Boddu
patent: 5084843 (1992-01-01), Mitsuishi
Alexander Samuel E.
Fisher Richard J.
Hewitt Kent D.
LaRoche Eugene R.
Microchip Technology Incorporated
Zarabian A.
LandOfFree
Write protection security for memory device does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Write protection security for memory device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Write protection security for memory device will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1788239