Write enhancement circuit

Details Write enhancement circuit Write enhancement circuit

1976-03-15

1978-02-21

Hecker, Stuart N.

Static information storage and retrieval

Systems using particular element

Flip-flop

307279, 307238, 365190, G11C 1140

Patent

active

040756904

ABSTRACT:
The operating potential to a storage element is supplied via an impedance element connected between a source of operating potential and a first power terminal of the storage element adapted to receive an operating potential. Information is written into the storage element via a gating transistor having its conduction path connected between an input line and a data input point to the storage element. Write circuitry includes means connected between the first power terminal and the input line. During a write operation, the write circuit, while applying the desired bit of information to the cell input, causes current to flow through the impedance element lowering the potential across the flip-flop until the desired bit of information is written into the cell.

REFERENCES:
patent: 3389383 (1968-06-01), Burke et al.
patent: 3609710 (1971-09-01), Browne
patent: 3971004 (1976-07-01), Dingwall
Cavaliere et al., Writable Array-Logic Cell, IBM Technical Disclosure Bulletin, vol. 17, No. 7, 12/74, pp. 1967-1968.

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