Write driver circuit of PRAM

Static information storage and retrieval – Read/write circuit – Testing

Reexamination Certificate

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Details

C365S163000, C365S189080, C365S189160

Reexamination Certificate

active

07990790

ABSTRACT:
A phase change random access memory (PRAM) has a function of evaluating the lifetime and reliability of a cell in a write driver circuit. The write driver circuit of the PRAM includes a normal driver configured to provide a write current for set or reset of a phase change cell connected to a bit line, a test driver configured to share a node with the normal driver, and provide an additional current for a test to the write current through the shared node in response to a test mode control signal, and a mode control unit configured to control an operation according to the test mode by providing the test mode control signal to the test driver.

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Notice of Allowance issued from Korean Intellectual Property Office on Nov. 29, 2010.

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