Write current shunting compensation

Details Write current shunting compensation Write current shunting compensation

2007-09-25

2007-09-25

Elms, Richard T. (Department: 2824)

Static information storage and retrieval

Systems using particular element

Magnetoresistive

C365S171000, C365S173000

Reexamination Certificate

active

10926237

ABSTRACT:
A magnetic random access memory (MRAM) is compensated for write current shunting by varying the bit size of each MRAM cell with position along the write line. The MRAM includes a plurality of magnetic tunnel junction memory cells arranged in an array of columns and rows. The width of each memory cell increases along a write line to compensate for write current shunting.

REFERENCES:
patent: 3466636 (1969-09-01), Anacker
patent: 5329480 (1994-07-01), Wu et al.
patent: 5640343 (1997-06-01), Gallagher et al.
patent: 5734605 (1998-03-01), Zhu et al.
patent: 5793697 (1998-08-01), Scheuerlein
patent: 6215707 (2001-04-01), Moyer
patent: 6351409 (2002-02-01), Rizzo et al.
patent: 6385079 (2002-05-01), Tran
patent: 6466475 (2002-10-01), Nickel
patent: 6490217 (2002-12-01), DeBrosse et al.
patent: 6538921 (2003-03-01), Daughton et al.
patent: 6621730 (2003-09-01), Lage
patent: 6807087 (2004-10-01), Deak
patent: 6882564 (2005-04-01), Fukuzumi
patent: 2004/0066667 (2004-04-01), Deak
patent: 2004/0085809 (2004-05-01), Fukuzumi

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