Write circuit for non-volatile memory device

Details Write circuit for non-volatile memory device Write circuit for non-volatile memory device

1991-02-19

1994-03-08

Mottola, Steven

Static information storage and retrieval

Read/write circuit

Differential sensing

365185, G11C 700, G11C 1140

Patent

active

052933440

ABSTRACT:
A write circuit for a non-volatile memory device includes a plurality of cell transistors and a bit line select transistor, provided with respect to each bit line, for supplying a source current thereof to one of the cell transistors as a drain current of the cell transistor via a corresponding one of the bit lines. The write circuit includes a dummy cell transistor for detecting a breakdown voltage of the cell transistor in a write mode, and a circuit for varying a gate voltage of the bit line select transistor as a function of the breakdown voltage detected by the dummy cell transistor, thereby to make the gate-source voltage of the bit line select transistor approximately constant and to maintain the drain current of the cell transistor during the write mode approximately constant.

REFERENCES:
patent: 4677590 (1987-06-01), Arakawa
patent: 4954990 (1990-09-01), Vider
Hoff et al., "A 23-ns 256K EPROM with Double-Layer Metal and Address Transition Detection," IEEE Journal of Solid-State Circuits, vol. 24, No. 5, Oct. 1989, pp. 1250-1258.

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