Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Reexamination Certificate
2001-03-15
2003-01-21
Nguyen, Hiep T. (Department: 2187)
Electrical computers and digital processing systems: memory
Storage accessing and control
Specific memory composition
C711S129000, C714S006130
Reexamination Certificate
active
06510490
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a write cache circuit, a recording apparatus with a write cache circuit, and a write cache method. More particularly, the present invention relates to a write cache circuit directed to improve the usage efficiency of the memory in the process of adding redundancy data for an error correction process to data transferred from a host, a recording apparatus including such a write cache circuit, and a write cache method.
2. Description of the Background Art
The conventional recording and reproduction apparatus adapted for a magneto-optical disk which is an example of a recording medium is known. The write system of such a recording and reproduction apparatus first caches (stores) the user data transferred from the host in a memory, and applies an encode process of adding a correction code and an error detection code (redundancy data), followed by recording onto a magneto-optical disk.
At the read system of this recording and reproduction apparatus, the data read out from a recording medium is subjected to an error correction process and an error detection process using the redundancy data added at the write system, and then transferred to the host side. Thus, data recorded at a recording medium is reproduced at high accuracy.
In the conventional recording and reproduction apparatus of a magneto-optical disk, data is arranged on the memory while reserving in advance a region where redundancy data is to be added for each user data in the error correction processing unit in the caching process.
However, there was a problem that the memory usage efficiency is degraded if data is arranged according to the address adaptive to the processing format.
SUMMARY OF THE INVENTION
Therefore, the object of the present invention is to provide a write cache circuit of high memory usage efficiency, a recording apparatus including such a write cache circuit, and a write cache method.
According to an aspect of the present invention, a write cache circuit is employed in a recording apparatus that records data transferred from a host on a recording medium with redundancy data for an error correction process added. The write cache circuit includes a random access memory having a host write region and an encode work region, a write circuit writing data transferred from the host into the host write region on the basis of an error correction block, a circuit transferring the data on the basis of the error correction block written in the host write region into the encode work region, and reading out data from the encode work region for a process of adding the redundancy data, or writing data obtained as a result of a process of adding redundancy data back into the encode work region, and a read circuit reading out data already added with the redundancy data from the data in the encode work region for recording on a recording medium.
Preferably, the host write region includes a plurality of write regions. Each of the plurality of write regions has a minimum size required to store the data on the basis of the error correction block.
Preferably, the encode work region includes two encode regions. Each of the two encode regions has a minimum size required to store the data on the basis of the error correction block and the corresponding redundancy data. The data of one of the two encode regions becomes a subject of the process adding redundancy data, and data of the other of the two encode regions is read out by the read circuit for recording on the recording medium.
More preferably, in the process of adding redundancy data, the data on the basis of the error correction block is added with error correction codes in a horizontal direction and a vertical direction for an error correction process by a product code.
According to another aspect of the present invention, a recording apparatus recording data transferred from a host on a recording medium with redundancy data for an error correction process added, includes an encoder adding the redundancy data, a write cache circuit, and a record processing circuit to modulate data added with the redundancy data for recording on the recording medium. The write cache circuit includes a random access memory having a host write region and an encode work region, a write circuit writing data transferred from the host into the host write region on the basis of an error correction block, a circuit transferring the data on the basis of the error correction block written in the host write region to the encode work region, and providing data from the encode work region to the encoder, or writing data received from the encoder back into the encode work region, and a read circuit reading out data already added with the redundancy data from the data in the encode work region and providing the read data to the record processing circuit.
Preferably, the host write region includes a plurality of write regions. Each of the plurality of write regions has a minimum size required to store the data on the basis of the error correction block.
Preferably, the encode work region includes two encode regions. Each of the two encode regions has a minimum size required to store the data on the basis of the error correction block and the corresponding redundancy data. Data of one of the two encode regions becomes a subject of a process by the encoder, and data of the other of the two encode regions becomes a subject of process by the record processing circuit.
More preferably, in the process of adding redundancy data, the data on the basis of the error correction block is added with error correction codes in a horizontal direction and a vertical direction for an error correction process by a product code.
According to a further aspect of the present invention, a write cache method in a recording apparatus including a random access memory having a host write region and an encode work region, and recording data transferred from a host on a recording medium with redundancy data for an error correction process added, includes the steps of writing data transferred from the host into the host write region on the basis of an error correction block, transferring the data on the basis of the error correction block written in the host write region to the encode work region, and reading out data from the encode work region for a process of adding the redundancy data, or writing data obtained as a result of the process of adding redundancy data back into the encode work region, and reading out data already added with redundancy data from the data in the encode work region for recording on the recording medium.
Preferably, the host write region includes a plurality of write regions. Each of the plurality of write regions has a minimum size required to store the data on the basis of the error correction block.
Preferably, the encode work region includes two encode regions. Each of the two encode regions has a minimum size required to store the data on the basis of the error correction block and the corresponding redundancy data. Data of one of the two encode regions becomes a subject of the process of adding redundancy data, and data of the other of the two encode regions is read out for recording on the recording medium.
Further preferably, in the process of adding redundancy data, data on the basis of the error correction block is added with error correction codes in a horizontal direction and a vertical direction for an error correction process by a product code.
According to the present invention, an encode region required for encoding and a write cache region required for caching are provided separately on a memory. Data can be read from the write cache region into the encode region for execution of a process in the ECC and EDC encode processes. Accordingly, the encode region is reduced significantly than that of a conventional case. The memory usage efficiency can be improved. The write cache efficiency can be improved even if the memory space is the same. Since it is not necessary to directly place the data transferred
Fuma Masato
Okamoto Miyuki
Armstrong Westerman & Hattori, LLP
Nguyen Hiep T.
Sanyo Electric Co,. Ltd.
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