Electrical computers and digital processing systems: memory – Addressing combined with specific memory configuration or... – Virtual machine memory addressing
Patent
1997-04-23
1999-09-14
Cabeca, John W.
Electrical computers and digital processing systems: memory
Addressing combined with specific memory configuration or...
Virtual machine memory addressing
711165, 395507, 395570, G06F 1200
Patent
active
059537361
ABSTRACT:
A pointer-specific instruction variant replacement mechanism facilitates an exact write barrier, i.e., a write barrier specific to pointer stores and transparent to non-pointer stores. Pointer store specific instruction replacement allows some implementations to provide an exact barrier specific to the particular set of intergenerational pointer stores that are of interest to a particular garbage collection method or combination of methods. The exact identification of pointer stores herein does not require tags encoded in-line with collected memory storage and does not require non-standard word sizes to support such tags. In one embodiment, a non-quick to quick translator cache provides pointer specific store instruction replacement. In another, self modifying code provides pointer specific store instruction replacement. An exemplary write barrier provided in accordance with the pointer-specific instruction variant replacement mechanism of this invention affords a garbage collector implementer with support for a wide variety of garbage collection methods, including remembered set-based methods, card-marking type methods, write barrier based copying collector methods, mark-sweep methods, etc., as well as combinations thereof and combinations including train algorithm type methods to managing mature portions of a generationally collected memory space. Such a write barrier can eliminate non-pointer stores from the set of stores that are evaluated against, for example, an intergenerational pointer store trap matrix or a garbage collection page mask to determine whether or not to trap. Such a write barrier can also eliminate entries associated with non-pointer stores from remembered set or card table stores for collection time scanning of modified portions of a collected generational space.
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O'Connor James Michael
Tremblay Marc
Vishin Sanjay
Cabeca John W.
Namazi Mehdi
Sun Microsystems Inc.
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