Write and read control circuit for semiconductor memories

Static information storage and retrieval – Read/write circuit – For complementary information

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365155, G11C 700

Patent

active

042728118

ABSTRACT:
A new and improved write and read control circuit for semiconductor memories is provided that comprises a first pair of transistors having their emitter terminals coupled to a current source, a base terminal of a first of the first pair being disposed for receiving data to be written in the array and a base terminal of a second of the first pair being coupled to a first reference potential, and each of the first pair of transistors having collector terminals; a second pair of transistors having their collector terminals coupled to a second reference potential, the base terminal of a first of the second pair being coupled to the collector terminal of the first of the first pair of transistors and the base terminal of a second of the second pair being coupled to the collector terminal of a second of the first pair, the emitter terminal of the first of the second pair being coupled to a second current source and forming a first output of the circuit, and the emitter terminal of the second of the second pair being coupled to a third current source and forming a second output of the circuit.

REFERENCES:
patent: 3725878 (1973-04-01), Berding
patent: 4099070 (1978-07-01), Reinert

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