Work function engineering for FN erase of a memory device...

Details Work function engineering for FN erase of a memory device... Work function engineering for FN erase of a memory device...

2007-12-10

2010-02-09

Toledo, Fernando L (Department: 2895)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S216000, C257SE21409, C257SE29300, C438S267000, C438S257000

Reexamination Certificate

active

07659569

ABSTRACT:
A memory device comprised of a plurality of memory cells that can each include multiple charge storage elements in undercut regions that are formed under a tunneling barrier and adjacent to a gate oxide layer of each memory cell. The tunneling barrier can be formed from a high work function material, such as P+ polycrystalline silicon or a P-type metal, and/or a high-K material. The memory cell can reduce the likelihood of gate electron injection through the gate electrode and into the charge storage elements during a Fowler-Nordheim erase by employing such tunneling barrier. Systems and methods of fabricating memory devices having at least one such memory cell are provided.

REFERENCES:
patent: 2004/0021172 (2004-02-01), Zheng et al.
patent: 2006/0281261 (2006-12-01), Kim
patent: 2007/0040223 (2007-02-01), Datta et al.
patent: 2007/0178635 (2007-08-01), Eldridge et al.
patent: 2008/0061359 (2008-03-01), Lee et al.
patent: 2008/0237696 (2008-10-01), Wang
Boron penetration in p+ polycrystalline-Si/AI203/Si metal-oxide-semiconductor system Dae-Gyu Park,a) Heung-Jae Cho, In-Seok Yeo, Jae-Sung Roh, and Jeong-Mo Hwang. Advanced Process Team, Memory Research and Development Division. Hyundal Electronics Industries Company Limited, Ichon P.O. Box 1010, Ichon-si, Kyoungki-do 467-701, Korea.

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