Wordline activation delay monitor using sample wordline located

Static information storage and retrieval – Read/write circuit – Differential sensing

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365200, 365 63, 327293, 327297, G11C 702

Patent

active

061153109

ABSTRACT:
A wordline activation delay monitor circuit is disclosed herein which includes a sample wordline located within a data-storing array of a memory, wherein the sample wordline is selected or activated by circuitry having substantially the same structure or location within the memory as circuitry which selects or activates wordlines of the data-storing array. A circuit is disclosed which determines a wordline activation delay for a first subarray group within the memory by activating a sample wordline which is located within a data-storing array of a second subarray group. Corresponding methods are also disclosed.

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