Word line selector for a semiconductor memory

Details Word line selector for a semiconductor memory Word line selector for a semiconductor memory

2005-03-08

2005-03-08

Lam, David (Department: 2818)

Static information storage and retrieval

Floating gate

Particular biasing

C365S185230, C365S230060

Reexamination Certificate

active

06865114

ABSTRACT:
A word line selector for selecting word lines of an array of semiconductor memory cells formed in a doped semiconductor region of a semiconductor substrate comprises a plurality of word line drivers responsive to word line selection signals. Each word line driver is associated with a respective word line for driving the word line to prescribed word line electric potentials, depending on an operation to be conducted on the array of memory cells, in accordance with the word line selection signal.

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Akira Umezawa et al: A S-V-ONLY Operation 0.6-UM Flash IEEPROM With Row Decoder Scheme In Triple-Wall Structure; IEEE Journal of Solid-State Circuits, IEEE Inc., New York, US, vol. 27, No. 11; Nov. 1, 1992, pp. 1540-1545, XP000320440 ISSN:0018-9200.

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